Digital Electronics - Shift Registers
Exercise : Shift Registers - General Questions
- Shift Registers - General Questions
- Shift Registers - True or False
- Shift Registers - Filling the Blanks
31.
A bidirectional 4-bit shift register is storing the nibble 1110. Its 
input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.
input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.32.
In a parallel in/parallel out shift register, D0 = 1, D1 = 1, D2 = 1, and D3 = 0. After three clock pulses, the data outputs are ________.
33.
The group of bits 10110111 is serially shifted (right-most bit first) into an 8-bit parallel output shift register with an initial state 11110000. After two clock pulses, the register contains ________.
34.
By adding recirculating lines to a 4-bit parallel-in, serial-out shift register, it becomes a ________, ________, and ________-out register.
35.
What type of register would have a complete binary number shifted in one bit at a time and have all the stored bits shifted out one at a time?
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