Digital Electronics - Logic Gates - Discussion

Discussion Forum : Logic Gates - Filling the Blanks (Q.No. 2)
2.

The gates in this figure are implemented using TTL logic. If the output of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________.

a steady LOW
a steady HIGH
an undefined level
pulses
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
4 comments Page 1 of 1.

Anuj said:   6 years ago
In TTL an open terminal is always "high" 1. So B will be at the output. B= pulses.

Anand said:   10 years ago
Doesn't 'open' mean no current in that wire i.e. HighZ, makes first input undriven.

Answer should be "an Undefined level".

Shan said:   1 decade ago
How to get pulses because one of the input is open it means "0" so output should be 0?

Shobha pathare said:   1 decade ago
If the o/p of inverter is open that means 0 and for B I/p is pulse means 1 so the o/p become 0.

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