Digital Electronics - Integrated-Circuit Logic Families - Discussion

Discussion Forum : Integrated-Circuit Logic Families - General Questions (Q.No. 15)
15.
Which of the following logic families has the highest noise margin?
TTL
LS TTL
CMOS
HCMOS
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
2 comments Page 1 of 1.

Divya said:   1 decade ago
In which logic family do you have the lowest noise margin?

Vrishti said:   8 years ago
High density Cmos.

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