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Digital Electronics - Integrated-Circuit Logic Families

Exercise : Integrated-Circuit Logic Families - Filling the Blanks
1.
When the outputs of several open-collector TTL gates are connected together, the gate outputs ________.
usually burn out
produce more voltage
are ANDed together
produce more fan-out
Answer: Option
Explanation:
No answer description is available. Let's discuss.
2.
Propagation delay is important because ________.
the logic gates must be given a short break during each clock cycle or else they will overheat
it limits the maximum operating frequency of a gate
it is a measure of how long the clock must be applied to the gate before it will make the required decision
all the gates in a system must have the same propagation times in order to be compatible
Answer: Option
Explanation:
No answer description is available. Let's discuss.
3.
________ output levels would not be a valid LOW for a TTL gate.
0.2 V
0.3 V
0.5 V
All of the above.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
4.
The minimum input voltage recognized as HIGH by a TTL gate is ________.
2.0 V
2.4 V
0.8 V
5.0 V
Answer: Option
Explanation:
No answer description is available. Let's discuss.
5.
The propagation delay of standard TTL gates is approximately ________.
2 s
1 s
4 ns
10 ns
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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