Digital Electronics - Integrated-Circuit Logic Families
Exercise : Integrated-Circuit Logic Families - True or False
- Integrated-Circuit Logic Families - General Questions
- Integrated-Circuit Logic Families - True or False
- Integrated-Circuit Logic Families - Filling the Blanks
1.
The major advantage of TTL logic circuits over CMOS is lower propagation delay.
2.
The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.
3.
The major advantage of CMOS logic circuits over TTL is very low power consumption.
4.
The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
5.
The noise margin for TTL is 0.8 V.
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