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Digital Electronics - Integrated-Circuit Logic Families

Exercise : Integrated-Circuit Logic Families - General Questions
21.
Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?
By connecting a radio-frequency capacitor from Vcc to ground.
By using a switching power supply
By connecting a capacitor from Vout to ground
By connecting a large resistor from Vcc to Vout
Answer: Option
Explanation:
No answer description is available. Let's discuss.
22.

What type of circuit is shown below and which statement best describes its operation?

It is a two-input CMOS AND gate with open drain.
It is a two-input CMOS buffer with tristate output.
It is a CMOS inverter with tristate output.
It is a hybrid TTL-CMOS inverter with FET totem-pole output.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
23.
What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?
5
10
50
100
Answer: Option
Explanation:
No answer description is available. Let's discuss.
24.
A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:
tPLH and tPHL.
tDLH and tDHL.
tHPL and tlph.
tLDH and tHDL.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
25.
What does ECL stand for?
It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors.
It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors.
It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower.
It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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