Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - General Questions (Q.No. 2)
2.
Which statement BEST describes the operation of a negative-edge-triggered D flip-flop?
The logic level at the D input is transferred to Q on NGT of CLK.
The Q output is ALWAYS identical to the CLK input if the D input is HIGH.
The Q output is ALWAYS identical to the D input when CLK = PGT.
The Q output is ALWAYS identical to the D input.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
13 comments Page 1 of 2.

Pratyusha said:   1 decade ago
By the truth table of D flip flop, we can observe that Q always depends on D.
Hence for every negative trigger pulse ,the logic at input D is shifted to Output Q.

Durga prasad said:   1 decade ago
d flip flop takes the -ve edge triggered if the input is low

Yasmin said:   1 decade ago
Q depends on the value of D.

Omm said:   1 decade ago
Point1:

FF is -ve edge triggered means the o/p will follow i/p only on transition of clock from 1 to 0.

It means that the o/p D=Qn=Qn-1 when clock changes from 1 to 0.

Dinesh said:   1 decade ago
The o/p changes only at the -ve edge of clk.

Bhagwat said:   1 decade ago
Negative edge triggered is created with the help of D-flip flop and D depends on Q.

AKARSH said:   1 decade ago
D stand for direct whatever will be the data at f/f it will transfer to o/p and on next clock it will transfer to next f/f, data will transfer directly on changing clock, f/f will respond according to -ve edge triggered clk in the same manner.

Khushboo c sharma said:   1 decade ago
Can anyone tell me what's the relation between CLK triggering and output of the Off.

Dipanjan said:   1 decade ago
What was PGT?

Majoni said:   1 decade ago
An edge-triggered flip-flop changes states either at the positive edge (rising edge) or at the negative edge (falling edge) of the clock pulse on the control input. The three basic types are introduced here: S-R, J-K and D.


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