Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - General Questions (Q.No. 15)
15.
Which of the following is correct for a gated D flip-flop?
The output toggles if one of the inputs is held HIGH.
Only one of the inputs can be HIGH at a time.
The output complement follows the input when enabled.
Q output follows the input D when the enable is HIGH.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
4 comments Page 1 of 1.

Tara said:   10 years ago
It's also called data, delay, & transparent flip flop.

Which data we apply in the i/p as it is found in the o/p?

Jitendra prajapat said:   1 decade ago
If clock is high then the D flip flop operate and we know that input is equals to output in case d flip flop.

LOVE SHUKLA said:   1 decade ago
There is no difference in present state and in next state in d flip-flop.

Vinay vikas said:   1 decade ago
As in this d-flip flop the output will be sme as of input, it is the condition of this flip flop.

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