Digital Electronics - Digital Arithmetic Operations and Circuits

Exercise :: Digital Arithmetic Operations and Circuits - General Questions

56. 

Could the sum output of a full-adder be used as a two-bit parity generator?

A. Yes
B. No

Answer: Option A

Explanation:

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57. 

In VHDL, what is a GENERATE statement?

A. The start statement of a program
B. Not used in VHDL or ADHL
C. A way to get the computer to generate a program from a circuit diagram
D. A way to tell the compiler to replicate several components

Answer: Option D

Explanation:

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58. 

Binary subtraction of a decimal 15 from 43 will utilize which two's complement?

A. 101011
B. 110000
C. 011100
D. 110001

Answer: Option D

Explanation:

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59. 

Which of the following is the primary advantage of using binary-coded decimal (BCD) instead of straight binary coding?

A. Fewer bits are required to represent a decimal number with the BCD code.
B. BCD codes are easily converted from decimal.
C. the relative ease of converting to and from decimal
D. BCD codes are easily converted to straight binary codes.

Answer: Option C

Explanation:

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60. 

How many inputs must a full-adder have?

A. 2
B. 3
C. 4
D. 5

Answer: Option B

Explanation:

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