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Digital Electronics - Digital Arithmetic Operations and Circuits

Exercise : Digital Arithmetic Operations and Circuits - General Questions
51.

Which of the statements below best describes the given figure?

Half-carry adder; Sum = 0, Carry = 1
Half-carry adder; Sum = 1, Carry = 0
Full-carry adder; Sum = 1, Carry = 0
Full-carry adder; Sum = 1, Carry = 1
Answer: Option
Explanation:
No answer description is available. Let's discuss.
52.
An 8-bit register may provide storage for two's-complement codes within which decimal range?
+128 to –128
–128 to +127
+128 to –127
+127 to –127
Answer: Option
Explanation:
No answer description is available. Let's discuss.
53.
A full-adder adds ________.
two single bits and one carry bit
two 2-bit binary numbers
two 4-bit binary numbers
two 2-bit numbers and one carry bit
Answer: Option
Explanation:
No answer description is available. Let's discuss.
54.
The carry propagation delay in 4-bit full-adder circuits:
is cumulative for each stage and limits the speed at which arithmetic operations are performed
is normally not a consideration because the delays are usually in the nanosecond range
decreases in direct ratio to the total number of full-adder stages
increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations
Answer: Option
Explanation:
No answer description is available. Let's discuss.
55.
An input to the mode pin of an arithmetic/logic unit (ALU) determines if the function will be:
one's-complemented
arithmetic or logic
positive or negative
with or without carry
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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