Digital Electronics - Combinational Logic Analysis
Exercise :: Combinational Logic Analysis - Filling the Blanks
1.
Assume you have A, B, C, and D available but not their complements. The minimum number of 2-input NAND gates required to implement the equation
Answer: Option C
Explanation:
2.
The symbol shown represents a(n) ________.
A. AND gate B. OR gate C. NAND gate D. NOR gate
Answer: Option D
Explanation:
3.
A gate can drive a number of load gate inputs up to its specified ________.
A. supply voltage B. noise margin C. fan-in D. fan-out
Answer: Option D
Explanation:
4.
The expression
A. an XOR gate B. an XNOR gate C. an AOI circuit D. three 2-input NAND gates
Answer: Option C
Explanation:
5.
The symbol shown represents ________.
A. AND-OR logic B. AOI logic C. XOR gate D. XNOR gate
Answer: Option A
Explanation:
is ________.
can be directly implemented using only ________.