Electronics - Number Systems and Codes - Discussion


Sample-and-hold circuits in ADCs are designed to:

[A]. sample and hold the output of the binary counter during the conversion process
[B]. stabilize the ADCs threshold voltage during the conversion process
[C]. stabilize the input analog signal during the conversion process
[D]. sample and hold the ADC staircase waveform during the conversion process

Answer: Option C


No answer description available for this question.

Avinash said: (May 9, 2012)  
The sample and hold circuits are essentially used in linear systems. In some kinds of analog-to-digital converters, the input is often compared to a voltage generated internally from a digital-to-analog converter (D-A-C). The circuit tries a series of values and stops converting once the voltages are "the same" within some defined error margin. If the input value was permitted to change during this comparison process, the resulting conversion would be inaccurate and possibly completely unrelated to the true input value. Such successive approximation converters will often incorporate internal sample and hold circuitry. In addition, sample and hold circuits are often used when multiple samples need to be measured at the same time. Each value is sampled and held, using a common sample clock.

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