Electronics and Communication Engineering - Power Electronics - Discussion


Assertion (A): SUS is a PUT and avalanche diode connected between gate and cathode

Reason (R): SBS has two SUS inbuilt together and connected in anti-parallel

[A]. Both A and R are correct and R is correct explanation of A
[B]. Both A and R correct but R is not correct explanation of A
[C]. A is correct but R is wrong
[D]. A is wrong but R is correct

Answer: Option B


No answer description available for this question.

Raja M said: (Oct 18, 2016)  
Please, can anyone explain it?

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