Electronics and Communication Engineering - Exam Questions Papers - Discussion
Discussion Forum : Exam Questions Papers - Exam Paper 18 (Q.No. 26)
26.
A 4 bit shift register is initialized to value 1000 for (Q3, Q2, Q1, Q0). The D input is derived from Q0, Q2 and Q3 through two XOR gates as shown in figure. The pattern 1000 will appear at
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