Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 9 (Q.No. 32)
32.
A gate in which shift register is connected as shown in the figure below. How many clock pulse (after reset to '0') the contents of the shift register are '000' again?
Discussion:
3 comments Page 1 of 1.
Jyoti Rani said:
3 years ago
Right, thanks @Anu.
ANU said:
5 years ago
Last FF output Qbar is given as input to the first FF in the first clock pulse. So during first clock pulse value in FFs will be 100 then 110 then 111 then 011 then 001 and last 6th clock pulse 000 again. So option B is correct.
A.G said:
5 years ago
Someone explain it, please.
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