Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 6 (Q.No. 24)
24.
For the NMOS gate in the given figure, F =


Answer: Option
Explanation:
B + C are in parallel and A is in series with this parallel combination, Similarly D + E are in series. Then D, E are in parallel with A, B and C Y = A(B + C) + DE .
Discussion:
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