Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 7 (Q.No. 30)
30.
A 4 bit synchronous counter uses flip flops with a delay time of 15 ns each. The time required for change of state is
Answer: Option
Explanation:
In a synchronous counter clock input is applied to all flip flops simultaneously. Hence total delay time is 15 ns.
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