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Electronics and Communication Engineering - Networks Analysis and Synthesis - Discussion

Discussion Forum : Networks Analysis and Synthesis - Section 8 (Q.No. 22)
Networks Analysis and Synthesis
22.
The VTH at terminals A and B is equal to
0 V
5 V
-5 V
none
Answer: Option
Explanation:

Apply KVL to loop 1

5V - 3I1 - 2 (I1 - I2) - 5V = 0

∴ I2 = 0

5V - 5V - 5I1 = 0 I1 = 0

∴ VAB = 5 volt.

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