Electronics and Communication Engineering - Electronic Devices and Circuits
Exercise : Electronic Devices and Circuits - Section 11
- Electronic Devices and Circuits - Section 13
- Electronic Devices and Circuits - Section 24
- Electronic Devices and Circuits - Section 23
- Electronic Devices and Circuits - Section 22
- Electronic Devices and Circuits - Section 21
- Electronic Devices and Circuits - Section 20
- Electronic Devices and Circuits - Section 19
- Electronic Devices and Circuits - Section 18
- Electronic Devices and Circuits - Section 17
- Electronic Devices and Circuits - Section 16
- Electronic Devices and Circuits - Section 15
- Electronic Devices and Circuits - Section 14
- Electronic Devices and Circuits - Section 1
- Electronic Devices and Circuits - Section 12
- Electronic Devices and Circuits - Section 11
- Electronic Devices and Circuits - Section 10
- Electronic Devices and Circuits - Section 9
- Electronic Devices and Circuits - Section 8
- Electronic Devices and Circuits - Section 7
- Electronic Devices and Circuits - Section 6
- Electronic Devices and Circuits - Section 5
- Electronic Devices and Circuits - Section 4
- Electronic Devices and Circuits - Section 3
- Electronic Devices and Circuits - Section 2
46.
Periodic recharging of the memory cells at regular intervals of 3 to 8 millisecond is required in a
47.
The frequency of the driving network connected between pins 1 and 2 of a 8085 chip must be
48.
Assertion (A): Divide-64 counter is a Mod-64 counter and divides the input frequency by 64
Reason (R): A Mod 64 counter can be obtained by cascading Mod 16 and Mod 4 counters.
49.
In number system e.g. 6, a “decade” counter has to recycle to 0 at the sixth count. Which of the connections indicate below will realize this resetting? (a logic “0” at the R inputs resets the counters)
None of these
50.
In 8085 microprocessor, in order to enable INTR interrupt, which of the following instruction are needed?
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