Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 19 (Q.No. 38)
38.
The sum S of A and B in a Half Adder can be implemented by using K NAND gates. The value of K is
Discussion:
Be the first person to comment on this question !
Post your comments here:
Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers