Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 5 (Q.No. 16)
16.
Two 2's complement number having sign bits X and Y are added and the sign bit of the result is Z. then, the occurrence of overflow is indicated by the Boolean function.
Answer: Option
Explanation:
carry of a one bit full order is given by expression XY + YZ + ZX.
Discussion:
5 comments Page 1 of 1.
Harryhari127 said:
8 years ago
This problem is based on 2's complement addition/subtraction (covered in number systems).
Here we have to write the Boolean expression for the case where overflow occurs.
In the 2's complement arithmetic we had seen that if MSB (Sign bit) of operands (Minuend & Subtrahend) is same, and the MSB of the result is different or vice versa an overflow occurs.
i.e x=0, y=0 & z=1;
or x=1, y=1 & z=0
Overflow occurs
So we can write it as x\y\z+xyz\.
So the answer is C.
Here we have to write the Boolean expression for the case where overflow occurs.
In the 2's complement arithmetic we had seen that if MSB (Sign bit) of operands (Minuend & Subtrahend) is same, and the MSB of the result is different or vice versa an overflow occurs.
i.e x=0, y=0 & z=1;
or x=1, y=1 & z=0
Overflow occurs
So we can write it as x\y\z+xyz\.
So the answer is C.
Abhishek said:
9 years ago
Overflow condition is represented by C.
Sarthak sanay said:
4 years ago
I think the right answer is option C.
Ishita shrivastava said:
4 years ago
It should be Option C.
Sushma said:
9 years ago
It is option C.
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