Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 1 (Q.No. 34)
34.
The counter in the given figure is
Answer: Option
Explanation:
When counter is 110 the counter resets. Hence mod 6.
Discussion:
13 comments Page 2 of 2.
Ashish said:
7 years ago
It is asynchronous counter with A as LSB (as clk is applied to A only).
Hence only up counting or down counting takes place.
Mod 6 is correct.
Hence only up counting or down counting takes place.
Mod 6 is correct.
Karthikraj said:
4 years ago
We get a high o/p at MSB ff is high. To get this B, C should be 1 and A is 0 to clock the middle ff. To get high at o/p is itself a reset state. Hence 110 is a toggle for reset. B=C=0 or B=0 and C=1 or vice versa are not possible. Hence the count is the answer i.e. mod-6.
Vishnu said:
4 years ago
Here is the trick;
a(lsb) b c(msb)
a and b set to clear
So 110==4+2+0=mod-6.
a(lsb) b c(msb)
a and b set to clear
So 110==4+2+0=mod-6.
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