Electronics and Communication Engineering - Digital Electronics - Discussion

Discussion Forum : Digital Electronics - Section 23 (Q.No. 15)
15.
A full adder is to be implemented using half adders and OR gates. A 4 bit parallel adder without any initial carry requires
8 half adders and 4 OR gates
8 half adders and 3 OR gates
7 half adders and 3 OR gates
7 half adders and 4 OR gates
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
1 comments Page 1 of 1.

Swathi said:   5 years ago
N bit parlell adder.

2 (n-1) half adders, (n-1) OR gate.

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