Electrical Engineering - RL Circuits - Discussion

Discussion Forum : RL Circuits - True or False (Q.No. 10)
10.
In a lag network, the output voltage lags the input voltage in phase.
True
False
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
2 comments Page 1 of 1.

Jitu said:   6 years ago
Here o/p voltage means = VR.
I/p voltage means = VL.
In R-L ckt, VL leads VR by 90degree.

Mani Prabhaker said:   8 years ago
In RL circuit, current lags the voltage then what is this output voltage and input voltage lagging case.
(1)

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