Digital Electronics - Shift Registers - Discussion
Discussion Forum : Shift Registers - General Questions (Q.No. 5)
5.
A bidirectional 4-bit shift register is storing the nibble 1101. Its 
input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.
input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.Discussion:
6 comments Page 1 of 1.
Mukesh said:
1 decade ago
Mode is high means its a right shift register so after 3 clock pulses enter bits are 011 and remained bit in register is 1 so dere for 0111 is required solutioin.
Ponshankar said:
1 decade ago
The entered 4-bit serially is 1011. First time it is shifted as 1101. For the second time it is shifted as 1110. Finally, the third time it is shifted as 0111.
(1)
Ashwini gawade said:
1 decade ago
At starting 1011
1st shift___ (right) 1101
2nd shift_____1110
3rd shift ___0111
So ans is 0111
1st shift___ (right) 1101
2nd shift_____1110
3rd shift ___0111
So ans is 0111
(2)
Prasad said:
1 decade ago
Does it mean that Shift right operation is equivalent to Rotate Right operation???
Dana Buedi said:
1 decade ago
signal line high means shift right
shift | waiting nibble | stored nibble
--------------------|------------------|------------------
initially | 1011: | 1101
right shift (1) | 101 | 1:110
right shift (2) | 10 | 11:11
right shift (3) | 1 | 011:1
rule : when a stored nibble bit is shifted out, a waiting nibble bit is shifted inn
Hence after the 3rd shift, the stored nibble is 0111
nice!!!
shift | waiting nibble | stored nibble
--------------------|------------------|------------------
initially | 1011: | 1101
right shift (1) | 101 | 1:110
right shift (2) | 10 | 11:11
right shift (3) | 1 | 011:1
rule : when a stored nibble bit is shifted out, a waiting nibble bit is shifted inn
Hence after the 3rd shift, the stored nibble is 0111
nice!!!
(2)
Boobalan said:
5 years ago
It's like ring counter?
Just assume
Ring counter initial value is 1011.
1 St -1101
2 nd - 1110
3 rd - 0111.
Right Shift register means we need to pad 0 in the left side.
Initial -1011
1st-0101
2 nd -0010
3 rd - 0001
So the answer is 0001 after three clock cycle.
Just assume
Ring counter initial value is 1011.
1 St -1101
2 nd - 1110
3 rd - 0111.
Right Shift register means we need to pad 0 in the left side.
Initial -1011
1st-0101
2 nd -0010
3 rd - 0001
So the answer is 0001 after three clock cycle.
(1)
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