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Digital Electronics - Ex-OR and Ex-NOR Gates

Exercise : Ex-OR and Ex-NOR Gates - General Questions
1.
Select the statement that best describes the parity method of error detection:
Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another.
Parity checking is not suitable for detecting single-bit errors in transmitted codes.
Parity checking is best suited for detecting single-bit errors in transmitted codes.
Parity checking is capable of detecting and correcting errors in transmitted codes.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
2.
A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):
Ex-NOR gate
OR gate
Ex-OR gate
NAND gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.
3.
A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
Ex-NOR gate
OR gate
Ex-OR gate
NAND gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.
4.
Identify the type of gate below from the equation
Ex-NOR gate
OR gate
Ex-OR gate
NAND gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.
5.
How is odd parity generated differently from even parity?
The first output is inverted.
The last output is inverted.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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