Digital Electronics - Digital Design

Exercise : Digital Design - General Questions
16.
A settable flip-flop's normal starting state when power is first applied to a circuit is always the ________ state.
reset
set
toggle
dual
Answer: Option
Explanation:
No answer description is available. Let's discuss.

17.
In the automatic reset circuit for a flip-flop, how long does it take the capacitor to completely charge?
1 time constant (RC)
2 time constants (RC)
5 time constants (RC)
10 time constants (RC)
Answer: Option
Explanation:
No answer description is available. Let's discuss.

18.
The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470- resistor. What is the current in the circuit when the LED is on?
7.02 mA
8.51 mA
10.63 mA
5.32 mA
Answer: Option
Explanation:
No answer description is available. Let's discuss.

19.
When the inputs to a flip-flop are changing at the same time that the active trigger edge of the input clock is making its transition, this condition is called:
racing
toggling
slave loading
pulse timing
Answer: Option
Explanation:
No answer description is available. Let's discuss.

20.
Is the propagation delay from the clock to the output for the 7476 the same as the delay from the set or reset to the output?
yes
no
Answer: Option
Explanation:
No answer description is available. Let's discuss.