Digital Electronics - Digital Design
Exercise : Digital Design - General Questions
- Digital Design - General Questions
- Digital Design - True or False
16.
A settable flip-flop's normal starting state when power is first applied to a circuit is always the ________ state.
17.
In the automatic reset circuit for a flip-flop, how long does it take the capacitor to completely charge?
18.
The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470-
resistor. What is the current in the circuit when the LED is on?

19.
When the inputs to a flip-flop are changing at the same time that the active trigger edge of the input clock is making its transition, this condition is called:
20.
Is the propagation delay from the clock to the output for the 7476 the same as the delay from the set or reset to the output?
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