Digital Electronics - Counters - Discussion

Discussion Forum : Counters - General Questions (Q.No. 24)

Counters

24.

The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:

external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs

modifying BCD counters to change states on every second input clock pulse

modifying asynchronous counters to change states on every second input clock pulse

elimination of the counter stages and the addition of combinational logic circuits to produce the desired counts

Answer: Option

Explanation:

No answer description is available. Let's discuss.

Discussion:

3 comments Page 1 of 1.

Suma said: 8 years ago

Explain it please.

Mann said: 1 decade ago

Please explain it.

Learn said: 1 decade ago

I think option 'D' also gives same meaning. Someone please help to understand this.

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