IndiaBIX

Digital Electronics - Counters

Exercise : Counters - Filling the Blanks
16.
In order to check the CLR function of a counter, ________.
apply the active level to the CLR input and check all of the Q outputs to see if they are all in their reset state
ground the CLR input and check to be sure that all of the Q outputs are LOW
connect the CLR input to Vcc and check to see if all of the Q outputs are HIGH
connect the CLR to its correct active level while clocking the counter; check to make sure that all of the Q outputs are toggling
Answer: Option
Explanation:
No answer description is available. Let's discuss.
17.

The circuit shown below is used for ________, and for the inputs shown, the DATA output will be ________.

multiplexing, 1
parallel-to-serial conversion, 0
demultiplexing, 0
parallel-to-serial conversion, HIGH
Answer: Option
Explanation:
No answer description is available. Let's discuss.
18.

________ is the output frequency of the counter shown below.

4 MHz
20 kHz
210.5 kHz
800 Hz
Answer: Option
Explanation:
No answer description is available. Let's discuss.
19.
An asynchronous binary up counter, made from a series of leading edge-triggered flip-flops, can be changed to a down counter by ________.
taking the output on the other side of the flip-flops ( instead of Q)
clocking of each succeeding flip-flop from the other side ( instead of Q)
changing the flip-flops to trailing edge triggering
all of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
20.
A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.
1.25 kHz
2.50 kHz
160 kHz
320 kHz
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers