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Digital Electronics - Counters

Exercise : Counters - Filling the Blanks
11.
A(n) ________ one-shot starts a pulse in response to a trigger and will restart the internal pulse timer every time a subsequent trigger edge occurs before the pulse is complete.
non-retriggerable
retriggerable
high-level triggered
edge-triggered
Answer: Option
Explanation:
No answer description is available. Let's discuss.
12.
Assume you want to determine the timing diagram for a 4-bit counter using an oscilloscope. The best choice for an oscilloscope trigger signal is ________.
the most significant bit (MSB)
the least significant bit (LSB)
the clock signal
from a composite of the MSB and LSB
Answer: Option
Explanation:
No answer description is available. Let's discuss.
13.

Referring to the function table given below, taking the CLEAR, S1, and S0 inputs all HIGH ________.

will inhibit the operation of the register
will reset the parallel registers and inhibit the serial data inputs
will cause the parallel data inputs to be loaded and passed to the parallel data outputs
will depend on what values are loaded into the parallel data inputs
Answer: Option
Explanation:
No answer description is available. Let's discuss.
14.
Assume a 4-bit ripple counter has a failure in the second flip-flop such that it "locks up." The third and fourth stages will ________.
continue to count with correct outputs
continue to count but have incorrect outputs
stop counting
turn into molten silicon
Answer: Option
Explanation:
No answer description is available. Let's discuss.
15.
In order to use a shift register as a counter, ________.
the register's serial input is the counter input and the serial output is the counter output
the parallel inputs provide the input signal and the output signal is taken from the serial data output
serial in/serial out register must be used
the serial output of the register is connected back to the serial input of the register
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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