Digital Electronics - Combinational Logic Circuits - Discussion
Discussion Forum : Combinational Logic Circuits - General Questions (Q.No. 5)
5.
For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the 
input be HIGH. What is the status of the Y output?
Discussion:
28 comments Page 1 of 3.
Jay said:
1 year ago
Here, It is a multiplexer. Regardless of the input and current state of the output, the enable line is directly connected to the internal AND Gates.
Thus, when EN bar = HIGH, all AND Gates are LOW.
This is connected to the OR Gate seen in the sources above.
Thus, the answer is A.
Thus, when EN bar = HIGH, all AND Gates are LOW.
This is connected to the OR Gate seen in the sources above.
Thus, the answer is A.
Suren said:
4 years ago
The answer is A.
Enable high = 1.
Enable high (complement) = 0.
So in question, EN specified as complement.
Everybody knows in digital electronics any letter with bar is treated as a complement of that letter. So EN bar = 0.
It means EN bar = high it is equal to active low. That is = 0.
Enable high = 1.
Enable high (complement) = 0.
So in question, EN specified as complement.
Everybody knows in digital electronics any letter with bar is treated as a complement of that letter. So EN bar = 0.
It means EN bar = high it is equal to active low. That is = 0.
Arshid Bhat said:
5 years ago
@All.
Multiplexer only works when (enable is low), as Here enable is high that means multiplexer is not working, so the output is low.
Multiplexer only works when (enable is low), as Here enable is high that means multiplexer is not working, so the output is low.
Passi said:
5 years ago
As (EN not) is HIGH therefore EN should be low & whenever the enable is low the device don't work hence resultant o/p should be low.
Passi said:
5 years ago
As (EN not) is HIGH therefore EN should be low & whenever the enable is low the device don't work hence resultant o/p should be low.
Yugandhar said:
6 years ago
I think the answer is C.
Peddaraju said:
6 years ago
The answer would be D. As the IC is in off mode.
Nagesh said:
6 years ago
Answer is A.
Because when enable is low, the circuit will be disabled, so output will be low.
Because when enable is low, the circuit will be disabled, so output will be low.
Dokhe said:
7 years ago
Because the D input out do the S input so the answer can be A, though the input is not enabled.
Jayant indLa said:
7 years ago
In any combinational or sequential digital circuit if they have En then only the circuit gives proper output value otherwise it should stay at a previous value, another wise circuit will enter into the meta-stable state.
So, it should remain or hold the previous value until next En High.
Here previously we have s1s2 as 11 so, it should be enabled d3 = 0.
so, the answer is LOW "0"
So, it should remain or hold the previous value until next En High.
Here previously we have s1s2 as 11 so, it should be enabled d3 = 0.
so, the answer is LOW "0"
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