Digital Electronics - Combinational Logic Circuits
Exercise : Combinational Logic Circuits - Filling the Blanks
- Combinational Logic Circuits - General Questions
- Combinational Logic Circuits - True or False
- Combinational Logic Circuits - Filling the Blanks
36.
In VHDL, data can be each of the following types except ________.
37.
When grouping cells within a K-map, the cells must be combined in groups of ________.
38.
The ________ circuit produces a HIGH output whenever the two inputs are unequal.
39.
The Boolean equation ________ results from this Karnaugh map.
40.
Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in ________ terms in the K-map and can be treated as either ________ or ________, in order to ________ the resulting term.
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