Digital Electronics - Combinational Logic Circuits

Exercise : Combinational Logic Circuits - Filling the Blanks
11.
Except for ________, STD_LOGIC may have the following values.
'z'
'U'
'?'
'L'
Answer: Option
Explanation:
No answer description is available. Let's discuss.

12.
A gate that could be used to compare two logic levels and provide a HIGH output if they are equal is a(n) ________.
XOR gate
XNOR gate
NAND gate
NOR gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.

13.
VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.
objects
LOGIC_VECTORS
designs
arrays
Answer: Option
Explanation:
No answer description is available. Let's discuss.

14.
The AND-OR-INVERT gates are designed to simplify implementation of ________.
POS logic
DeMorgan's theorem
NAND logic
SOP logic
Answer: Option
Explanation:
No answer description is available. Let's discuss.

15.
The output of a gate has an internal short; a current tracer will ________.
identify the defective gate
show whether the gate is shorted to Vcc or ground
probably not be able to locate the problem
be able to identify the defective load node
Answer: Option
Explanation:
No answer description is available. Let's discuss.