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Digital Electronics - Combinational Logic Circuits

Exercise : Combinational Logic Circuits - General Questions
16.

For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the input is HIGH. What is the status of the outputs?

All are HIGH.
All are LOW.
All but are LOW.
All but are HIGH.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
17.
Which of the following combinations cannot be combined into K-map groups?
Corners in the same row
Corners in the same column
Diagonal corners
Overlapping combinations
Answer: Option
Explanation:
No answer description is available. Let's discuss.
18.
As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.
A defective IC chip that is drawing excessive current from the power supply
A solar bridge between the inputs on the first IC chip on the board
An open input on the first IC chip on the board
A defective output IC chip that has an internal open to Vcc
Answer: Option
Explanation:
No answer description is available. Let's discuss.
19.
Which gate is best used as a basic comparator?
NOR
OR
Exclusive-OR
AND
Answer: Option
Explanation:
No answer description is available. Let's discuss.
20.

The device shown here is most likely a ________.

comparator
multiplexer
demultiplexer
parity generator
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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