Placement Papers - eInfochips

eInfochips Private Limited
Einfochips Limited Interview Experience - 16 Oct 2014
Posted by :
Pinakin Suryavanshi
(8)
Hello guys,

This is Pinakin. I have done my masters in EC from Parul Institute of Engineering and Tech. I am sharing my interview experience in Einfochips. First of all there was a Pre-Placement Talk of 1 hour almost. Then there was a written test of 60 marks 1 hour.

Details:
Digital Electronics (Flipflops, K maps, SOP, POS, D'morgan laws, function implementation using gates). Analog Electronics (Op-amps, Power amplifiers, FM, AM).

Aptitude: 10 marks (I don't remember the questions !).
GK: 5 marks.

Interview Round 1:
I was asked following questions,
Verilog programs for D latch, JK FF, Swapping of two nos.
Set up time.
Hold time.
Metastability.
Race condition.
Memories (RAM, ROM, ETC).
CMOS fabrication.
Making gates using MUX.
Making different functions using MUX.

Interview Round 2:
Questions related to my BE final year project.
Questions related to my ME dissertation work.
There were some logical reasoning questions also. But if you are technically strong, no need to prepare for it.

All The Best. !