# Online Electronics and Communication Engineering Test - Digital Electronics Test 1

Instruction:

• This is a FREE online test. DO NOT pay money to anyone to attend this test.
• Total number of questions : 20.
• Time alloted : 30 minutes.
• Each question carry 1 mark, no negative marks.
• DO NOT refresh the page.
• All the best :-).

1.

A.
 binary states 1000 to 1111
B.
 binary states 0000 to 0011
C.
 binary states 1010 to 1111
D.
 binary states 1111 to higher

Explanation:

A decade counter counts from 0 to 9. It has 4 flip-flops. The states skipped are 10 to 15 or 1010 to 1111.

2.

A ring counter with 5 flip flops will have

A.
 5 states
B.
 10 states
C.
 32 states
D.
 infinite states

3.

The minimum number of NAND gates required to implement the Boolean function A +AB + ABC is equal to

A.
 0
B.
 1
C.
 4
D.
 7

Explanation:

A + AB +A B C = A + AB ( 1 + C) = A + AB = A(1 + B) = A.

4.

The number of counter states which an 8 bit stair step A/D converter has to pass through before conversion takes place is equal to

A.
 1
B.
 8
C.
 255
D.
 256

Explanation:

28 = 256.

5.

A dynamic RAM cell which holds 5 V has to be refreshed every 20 ms so that the stored voltage does not fall by more than 0.5 V. If the cell has a constant discharge current of 0.1 pA, the storage capacitance of cell is

A.
 4 x 10-6 F
B.
 4 x 10-9 F
C.
 4 x 10-12 F
D.
 4 x 10-15 F

Explanation:

Q = 20 x 10-3 x 0.1 x 10-12 = 2 x 10-15 C and .

6.

The modulus of counter in the given figure is

A.
 1
B.
 2
C.
 3
D.
 4

Explanation:

Third clock pulse resets the counter to 00 state. Hence mod is 3.

7.

Which of the following is not a characteristic of a flip flop?

A.
 It is a bistable device
B.
 It has two outputs
C.
 It has two outputs are complement of each other
D.
 It has one input terminal

Explanation:

Flip-flop has more than 1 input.

8.

Y = A + A B is the same as

A.
 Y = AB
B.
 Y = A + B
C.
 Y = A + B
D.
 Y = A + B

Explanation:

Verify by preparing truth table.

9.

A microprocessor with a 16 bit address bus is used in a linear memory selection configuration. Address bus lines are directly uses as chip selects of memory chips with 4 memory chips the maximum addressable memory space is

A.
 64 k
B.
 16 k
C.
 8 k
D.
 4 k

10.

Assertion (A): A high density IC has more diodes, transistors and resistors per unit surface area.

Reason (R): A high density IC can handle high voltages.

A.
 Both A and R are correct and R is correct explanation of A
B.
 Both A and R are correct but R is not correct explanation of A
C.
 A is true, R is false
D.
 A is false, R is true

11.

The boolean expression for shaded area in the given figure is

A.
 AB + AC
B.
 ABC + ABC
C.
 ABC + ABC
D.
 None of these

12.

Which of the following is not a specification of D/A and A/D converters?

A.
 Gain
B.
 Drift
C.
 Speed
D.
 Accuracy

13.

Which of the following is susceptible to race condition?

A.
 R-S latch
B.
 D latch
C.
 Both R - S and D latches
D.
 None of the above

14.

For a NAND SR latch of input is the normal resting state of inputs is

A.
 S = R = 1
B.
 S = 0, R = 1
C.
 S = 1, R = 0
D.
 S = R = 0

15.

Reason (R): The carry look ahead adder generates the carry and sum digits directly.

A.
 Both A and R are correct and R is correct explanation of A
B.
 Both A and R are correct but R is not correct explanation of A
C.
 A is true, R is false
D.
 A is false, R is true

16.

The high voltage level of a digital signal in positive logic is

A.
 1
B.
 0
C.
 either 1 or 0
D.
 -1

17.

In a sequential circuit the output at any instant depends on

A.
 present inputs only
B.
 past inputs only
C.
 past outputs only
D.
 past output and present input

18.

Which of the- following display consumes least amount of power?

A.
 LCD
B.
 LED
C.
 Fluorescent display
D.
 All display consume same power

19.

If one wants to design a binary counter, preferred type of flip-flop is

A.
 D-type
B.
 SR type
C.
 Latch
D.
 JK type

20.

Assertion (A): A presettable counter can be preset to any desired starting point

Reason (R): The maximum frequency of a ripple counter depends on the modulus.

A.
 Both A and R are correct and R is correct explanation of A
B.
 Both A and R are correct but R is not correct explanation of A
C.
 A is true, R is false
D.
 A is false, R is true