Digital Electronics Test 1 - Online Electronics and Communication Engineering Test

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Total number of questions: 20.
Time allotted: 30 minutes.
Each question carries 1 mark; there are no negative marks.
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Marks : 2/20

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A decade counter skips

binary states 1000 to 1111

binary states 0000 to 0011

binary states 1010 to 1111

binary states 1111 to higher

[#]

A ring counter with 5 flip flops will have

5 states

10 states

32 states

infinite states

[#]

The minimum number of NAND gates required to implement the Boolean function A +AB + ABC is equal to

[#]

The number of counter states which an 8 bit stair step A/D converter has to pass through before conversion takes place is equal to

255

256

[#]

A dynamic RAM cell which holds 5 V has to be refreshed every 20 ms so that the stored voltage does not fall by more than 0.5 V. If the cell has a constant discharge current of 0.1 pA, the storage capacitance of cell is

4 x 10^-6 F

4 x 10^-9 F

4 x 10^-12 F

4 x 10^-15 F

[#]

Which of the following is not a characteristic of a flip flop?

It is a bistable device

It has two outputs

It has two outputs are complement of each other

It has one input terminal

[#]

The modulus of counter in the given figure is

[#]

Y = A + A B is the same as

Y = AB

Y = A + B

[#]

A microprocessor with a 16 bit address bus is used in a linear memory selection configuration. Address bus lines are directly uses as chip selects of memory chips with 4 memory chips the maximum addressable memory space is

64 k

16 k

8 k

4 k

[#]

10.

The boolean expression for shaded area in the given figure is

AB + AC

ABC + ABC

None of these

[#]

11.

Assertion (A): A high density IC has more diodes, transistors and resistors per unit surface area.

Reason (R): A high density IC can handle high voltages.

Both A and R are correct and R is correct explanation of A

Both A and R are correct but R is not correct explanation of A

A is true, R is false

A is false, R is true

[#]

12.

Which of the following is not a specification of D/A and A/D converters?

Gain

Drift

Speed

Accuracy

[#]

13.

Which of the following is susceptible to race condition?

R-S latch

D latch

Both R - S and D latches

None of the above

[#]

14.

For a NAND SR latch of input is the normal resting state of inputs is

S = R = 1

S = 0, R = 1

S = 1, R = 0

S = R = 0

[#]

15.

Assertion (A): The carry look ahead adder is very fast

Reason (R): The carry look ahead adder generates the carry and sum digits directly.

Both A and R are correct and R is correct explanation of A

Both A and R are correct but R is not correct explanation of A

A is true, R is false

A is false, R is true

[#]

16.

In a sequential circuit the output at any instant depends on

present inputs only

past inputs only

past outputs only

past output and present input

[#]

17.

The high voltage level of a digital signal in positive logic is

either 1 or 0

-1

[#]

18.

Which of the- following display consumes least amount of power?

LCD

LED

Fluorescent display

All display consume same power

[#]

19.

If one wants to design a binary counter, preferred type of flip-flop is

D-type

SR type

Latch

JK type

[#]

20.

Assertion (A): A presettable counter can be preset to any desired starting point

Reason (R): The maximum frequency of a ripple counter depends on the modulus.

Both A and R are correct and R is correct explanation of A

Both A and R are correct but R is not correct explanation of A

A is true, R is false

A is false, R is true

[#]

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Online Electronics and Communication Engineering Test - Digital Electronics Test 1

Marks : 2/20

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