Electronics - Sequential Logic Circuits

Why Electronics Sequential Logic Circuits?

In this section you can learn and practice Electronics Questions based on "Sequential Logic Circuits" and improve your skills in order to face the interview, competitive examination and various entrance test (CAT, GATE, GRE, MAT, Bank Exam, Railway Exam etc.) with full confidence.

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Where can I get Electronics Sequential Logic Circuits Interview Questions and Answers (objective type, multiple choice)?

Here you can find objective type Electronics Sequential Logic Circuits questions and answers for interview and entrance examination. Multiple choice and true or false type questions are also provided.

How to solve Electronics Sequential Logic Circuits problems?

You can easily solve all kind of Electronics questions based on Sequential Logic Circuits by practicing the objective type exercises given below, also get shortcut methods to solve Electronics Sequential Logic Circuits problems.

Exercise :: Sequential Logic Circuits - General Questions

1. 

A ripple counter's speed is limited by the propagation delay of:

A. each flip-flop
B. all flip-flops and gates
C. the flip-flops only with gates
D. only circuit gates

Answer: Option A

Explanation:

No answer description available for this question. Let us discuss.

2. 

To operate correctly, starting a ring counter requires:

A. clearing all the flip-flops
B. presetting one flip-flop and clearing all the others
C. clearing one flip-flop and presetting all the others
D. presetting all the flip-flops

Answer: Option B

Explanation:

No answer description available for this question. Let us discuss.

3. 

What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

A. PIPO
B. SISO
C. SIPO
D. PISO

Answer: Option B

Explanation:

No answer description available for this question. Let us discuss.

4. 

Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:

A. input clock pulses are applied only to the first and last stages
B. input clock pulses are applied only to the last stage
C. input clock pulses are not used to activate any of the counter stages
D. input clock pulses are applied simultaneously to each stage

Answer: Option D

Explanation:

No answer description available for this question. Let us discuss.

5. 

One of the major drawbacks to the use of asynchronous counters is that:

A. low-frequency applications are limited because of internal propagation delays
B. high-frequency applications are limited because of internal propagation delays
C. Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications.
D. Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications.

Answer: Option B

Explanation:

No answer description available for this question. Let us discuss.




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