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Electronics - Sequential Logic Circuits

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Exercise

"In the middle of difficulty lies opportunity."
- Albert Einstein
1. 

A ripple counter's speed is limited by the propagation delay of:

A. each flip-flop
B. all flip-flops and gates
C. the flip-flops only with gates
D. only circuit gates

2. 

To operate correctly, starting a ring counter requires:

A. clearing all the flip-flops
B. presetting one flip-flop and clearing all the others
C. clearing one flip-flop and presetting all the others
D. presetting all the flip-flops

3. 

What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

A. PIPOB. SISO
C. SIPOD. PISO

4. 

Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:

A. input clock pulses are applied only to the first and last stages
B. input clock pulses are applied only to the last stage
C. input clock pulses are not used to activate any of the counter stages
D. input clock pulses are applied simultaneously to each stage

5. 

One of the major drawbacks to the use of asynchronous counters is that:

A. low-frequency applications are limited because of internal propagation delays
B. high-frequency applications are limited because of internal propagation delays
C. Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications.
D. Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications.




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