This circuit is a edge-triggered D flip-flop. It functions the same as a master-slave flip-flop (except that it is positive-edge triggered), but uses fewer gates in its design.
The circuit consists of 3 set-reset latches. The latch on the right controls the output. When the D input (at lower left) is high, the lower-left latch is set whenever the clock is low. This triggers the set input of the upper-left latch, which sets the output latch whenever the clock is high. When the D input is low, the lower-left latch is reset, causing the output latch to be reset whenever the clock is high.
The result is that output can only change state when the clock makes a transition from low to high. -- Credits: Mr. Paul Falstad.
|Studentlife said: (Jan 13, 2011)|
|Hello I am the student of computer systems engineering. I want to design my own robots. So how can I do that. I am very found of robots. I am in 3rd semester now.|
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