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Digital Electronics - Shift Registers

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Exercise

"If you judge people, you have no time to love them."
- Mother Teresa
1. 

On the fifth clock pulse, a 4-bit Johnson sequence is Q0 = 0, Q1 = 1, Q2 = 1, and Q3 = 1. On the sixth clock pulse, the sequence is ________.

A. Q0 = 1, Q1 = 0, Q2 = 0, Q3 = 0
B. Q0 = 1, Q1 = 1, Q2 = 1, Q3 = 0
C. Q0 = 0, Q1 = 0, Q2 = 1, Q3 = 1
D. Q0 = 0, Q1 = 0, Q2 = 0, Q3 = 1

2. 

The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?

A. 0000B. 0010
C. 1000D. 1111

3. 

What is a shift register that will accept a parallel input, or a bidirectional serial load and internal shift features, called?

A. tristate
B. end around
C. universal
D. conversion

4. 

On the third clock pulse, a 4-bit Johnson sequence is Q0 = 1, Q1 = 1, Q2 = 1, and Q3 = 0. On the fourth clock pulse, the sequence is ________.

A. Q0 = 1, Q1 = 1, Q2 = 1, Q3 = 1
B. Q0 = 1, Q1 = 1, Q2 = 0, Q3 = 0
C. Q0 = 1, Q1 = 0, Q2 = 0, Q3 = 0
D. Q0 = 0, Q1 = 0, Q2 = 0, Q3 = 0

5. 

A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.

A. 1101B. 0111
C. 0001D. 1110




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