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# Digital Electronics - Flip-Flops

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### Exercise

"To err is human; to forgive, divine."
- Alexander Pope
49.

To completely load and then unload an 8-bit register requires how many clock pulses?

 A. 2 B. 4 C. 8 D. 16

50.

What is one disadvantage of an S-R flip-flop?

 A. It has no enable input. B. It has an invalid state. C. It has no clock input. D. It has only a single output.

51.

Which of the following best describes the action of pulse-triggered FF's?

 A. The clock and the S-R inputs must be pulse shaped. B. The data is entered on the leading edge of the clock, and transferred out on the trailing edge of the clock. C. A pulse on the clock transfers data from input to output. D. The synchronous inputs must be pulsed.

52.

An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.

 A. HIGHs are applied simultaneously to both inputs S and R B. LOWs are applied simultaneously to both inputs S and R C. a LOW is applied to the S input while a HIGH is applied to the R input D. a HIGH is applied to the S input while a LOW is applied to the R input

53.

On a J-K flip-flop, when is the flip-flop in a hold condition?

 A. J = 0, K = 0 B. J = 1, K = 0 C. J = 0, K = 1 D. J = 1, K = 1

54.

The output pulse width for a 555 monostable circuit with R1 = 3.3 k and C1 = 0.02 F is ________.

 A. 7.3 s B. 73 s C. 7.3 ms D. 73 ms