Digital Electronics - Ex-OR and Ex-NOR Gates

Why Digital Electronics Ex-OR and Ex-NOR Gates?

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Exercise :: Ex-OR and Ex-NOR Gates - General Questions

1. 

Select the statement that best describes the parity method of error detection:

A. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another.
B. Parity checking is not suitable for detecting single-bit errors in transmitted codes.
C. Parity checking is best suited for detecting single-bit errors in transmitted codes.
D. Parity checking is capable of detecting and correcting errors in transmitted codes.

Answer: Option C

Explanation:

No answer description available for this question. Let us discuss.

2. 

A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):

A. Ex-NOR gate
B. OR gate
C. Ex-OR gate
D. NAND gate

Answer: Option A

Explanation:

No answer description available for this question. Let us discuss.

3. 

A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):

A. Ex-NOR gate
B. OR gate
C. Ex-OR gate
D. NAND gate

Answer: Option C

Explanation:

No answer description available for this question. Let us discuss.

4. 

Identify the type of gate below from the equation

A. Ex-NOR gate
B. OR gate
C. Ex-OR gate
D. NAND gate

Answer: Option C

Explanation:

No answer description available for this question. Let us discuss.

5. 

How is odd parity generated differently from even parity?

A. The first output is inverted.
B. The last output is inverted.

Answer: Option B

Explanation:

No answer description available for this question. Let us discuss.



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