IndiaBIX.com
Arithmetic Aptitude Data Interpretation
Logical Reasoning Verbal Reasoning Non Verbal Reasoning
General Knowledge
Sudoku Number puzzles Missing letters puzzles Logical puzzles Playing cards puzzles Clock puzzles
C Programming C++ Programming C# Programming Java Programming
Microbiology Biochemistry Biotechnology Biochemical Engineering
Civil Engineering Mechanical Engineering Chemical Engineering Networking Database Questions Computer Science Basic Electronics Digital Electronics Electronic Devices Circuit Simulation Electrical Enigneering Engineering Mechanics Technical Drawing
Placement Papers Group Disucssion HR Interview Technical Interview Body Language
Aptitude Test Verbal Ability Test Verbal Reasoning Test Logical Reasoning Test C Programming Test Java Programming Test Data Interpretation Test General Knowledge Test
Data Structures Operating Systems Networking DATABASE Database Basics SQL Server Basics SQL Server Advanced SQL Server 2008 JAVA Core Java Java Basics Advanced Java UNIX Unix File Management Unix Memory Management Unix Process Managemnt C Interview Questions The C Language Basics .NET Interview Questions .NET Framework ADO.NET ASP.NET Software Testing

Digital Electronics - Digital System Projects Using HDL

Exercise

"It takes a very long time to become young."
- Pablo Picasso
1. 

In a frequency counter, what happens at high frequencies when the sampling interval is too long?
A. The counter works fine.
B. The counter undercounts the frequency.
C. The measurement is less precise.
D. The counter overflows.
2. 

In the digital clock project, when does the PM indicator go high?
A. Never
B. Going from 11:59:59 to 12:00:00
C. Going from 12:59:59 to 01:00:00
D. On the falling edge of the clock after enable goes high
3. 

How is the output frequency related to the sampling interval of a frequency counter?
A. Directly with the sampling interval
B. Inversely with the sampling interval
C. More precision with longer sampling interval
D. Less precision with longer sampling interval
4. 

In an HDL application of a stepper motor, after an up/down counter is built what is done next?
A. Build the sequencer
B. Test it on a simulator
C. Test the decoder
D. Design an intermediate integer variable
5. 

In a digital clock application, the basic frequency must be divided down to:
A. 1 Hz.
B. 60 Hz.
C. 100 Hz.
D. 1000 Hz.

Read more:

© 2008-2013 by IndiaBIX™ Technologies. All Rights Reserved | Copyright | Terms of Use & Privacy Policy

Contact us: info@indiabix.com     Follow us on twitter!