Digital Electronics - Digital Concepts - Discussion

4. 

The generic array logic (GAL) device is ________.

[A]. one-time programmable
[B]. reprogrammable
[C]. a CMOS device
[D]. reprogrammable and a CMOS device

Answer: Option B

Explanation:

No answer description available for this question.

Manumohandas said: (Dec 18, 2010)  
Can any one explain about generic array logic.

Ajay Singh Thakur said: (Jan 27, 2011)  
The Generic Array Logic (also known as GAL) device was an innovation of the PAL (Programmable Array Logic) and was invented by Lattice Semiconductor. The GAL was an improvement on the PAL because one device was able to take the place of many PAL devices or could even have functionality not covered by the original range. Its primary benefit, however, was that it was eraseable and re-programmable making prototyping and design changes easier for engineers.

Latha said: (Mar 17, 2011)  
isn't a cmos device..?

Praveen said: (Feb 2, 2012)  
The GAL was an improvement on the PAL because one device was able to take the place of many PAL devices or could even have functionality not covered by the original range. Its primary benefit, however, was that it was eraseable and re-programmable making prototyping and design changes easier for engineers.

Shravan said: (Aug 5, 2013)  
Generic array logic has reprogrammable AND array, fixed OR array and reprogrammable output logic. And it is cmos based.

Logeshwaran.M said: (Aug 13, 2013)  
What is cmos?

Sapna said: (Aug 31, 2013)  
(CMOS) complementary metal oxide semiconductor. It's a chip. CMOS put on motherboard.

Rashmitha said: (Nov 1, 2013)  
Complementary metal oxide semiconductor(CMOS) is a combination of both NMOS and PMOS. CMOS is preferred when low power consumption is required. In CMOS circuit PMOS act as Pull up transistor and NMOS as pull down transistor.

Janu said: (Dec 4, 2013)  
What is pull up transister and pull down transister. Where it is used?

Shaliha said: (Jan 30, 2014)  
What is the diff btw pullup and pull down transistors?

Jayanti said: (Apr 2, 2014)  
Pull up means whenever we give input low that time the pmos device will conducts, that time the capacitor becomes charges, while in nmos it is pull down means that we give i/p is high(1) then it will conducts capacitor will discharge.

Valmik said: (Sep 24, 2014)  
In simple word pull up means in low voltage input PMOS made desired high voltage and when high voltage input CMOS made desired low voltage.

Pranathi said: (Jan 31, 2016)  
If it is CMOS based then the answer should be option D? Can anyone please explain me?

Remyags said: (Mar 30, 2016)  
If it is CMOS based, then the answer should be option [D].

Vatsala said: (May 6, 2017)  
It consists of CMOS. The output logic of GAL consists CMOS. I don't know if that means that the device is CMOS itself.

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