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Digital Electronics - Counters

@ : Home > Digital Electronics > Counters > General Questions

Exercise

"Success has many fathers, while failure is an orphan."
- (Proverb)
19. 

The circuit given below has no output on Q1 when examined with an oscilloscope. All J-K inputs are HIGH, the CLK signal is present, and the Q0 is toggling. The C input of FF1 is a constant LOW. What could be causing the problem?

A. The Q0 output should be connected to the J input of FF1.
B. The output of FF0 may be shorted to ground.
C. The input of FF1 may be shorted to ground.
D. Either the output of FF0 or the input of FF1 may be shorted to ground.

20. 

How many flip-flops are required to construct a decade counter?

A. 10B. 8
C. 5D. 4

21. 

The terminal count of a typical modulus-10 binary counter is ________.

A. 0000B. 1010
C. 1001D. 1111

22. 

A seven-segment, common-anode LED display is designed for:

A. all cathodes to be wired together
B. one common LED
C. a HIGH to turn off each segment
D. disorientation of segment modules

23. 

To operate correctly, starting a ring counter requires:

A. clearing one flip-flop and presetting all the others.
B. clearing all the flip-flops.
C. presetting one flip-flop and clearing all the others.
D. presetting all the flip-flops.

24. 

The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:

A. external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs
B. modifying BCD counters to change states on every second input clock pulse
C. modifying asynchronous counters to change states on every second input clock pulse
D. elimination of the counter stages and the addition of combinational logic circuits to produce the desired counts




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