"Success has many fathers, while failure is an orphan."
The circuit given below has no output on
Q 1 when examined with an oscilloscope. All J-K inputs are HIGH, the CLK signal is present, and the Q 0 is toggling. The C input of FF 1 is a constant LOW. What could be causing the problem?
A. The Q 0 output should be connected to the J input of FF 1.
B. The output of FF 0 may be shorted to ground.
C. The input of FF 1 may be shorted to ground.
D. Either the output of FF 0 or the input of FF 1 may be shorted to ground.
To operate correctly, starting a ring counter requires:
A. clearing one flip-flop and presetting all the others.
B. clearing all the flip-flops.
C. presetting one flip-flop and clearing all the others.
D. presetting all the flip-flops.
The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:
A. external logic circuits that decode the various states of the counter to apply the correct logic levels to the J-K inputs
B. modifying BCD counters to change states on every second input clock pulse
C. modifying asynchronous counters to change states on every second input clock pulse
D. elimination of the counter stages and the addition of combinational logic circuits to produce the desired counts