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Digital Electronics - Combinational Logic Circuits - Discussion

@ : Home > Digital Electronics > Combinational Logic Circuits > General Questions - Discussion

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"Everything you can imagine is real."
- Pablo Picasso
4. 

For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?

[A]. LOW
[B]. HIGH
[C]. Don't Care
[D]. Cannot be determined

Answer: Option C

Explanation:

No answer description available for this question.


Shardul Kandari said: (Fri, Dec 3, 2010 12:48:53 AM)    
 
here EN denotes that it is enable & if we keep the enable low then how high the other outputs are the circuit remains low

Sneha Jose said: (Fri, Feb 4, 2011 04:32:47 AM)    
 
EN is low means ic is enabled. When s0, s1 are high, it selects d3 to output. Since d3 is low, output is low.

Maulik said: (Tue, Mar 8, 2011 09:46:16 AM)    
 
s1=1&s2=1
&d3 is selected

EN=0
d3=0

So, y=0

Ravi Kumar Sinha said: (Tue, Sep 27, 2011 10:41:38 AM)    
 
Since s1 and s2 are 1 so 11 is the state which means d3 will be selected and since d3 is low so output will be low.

Kokila said: (Sun, May 13, 2012 10:57:13 AM)    
 
S1 and S2 are high. Then input of D3 will be the output. Hence answer is low since D3 is low.

Akhilesh Maurya said: (Sat, May 26, 2012 03:21:43 PM)    
 
Here, S1 and S2 are enabled i.e. both are at HIGH(1 1) state then D3 must be enable & D3 will be as output but all D are LOW so output is LOW(D3)

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